A Complex Multiplier Using Overturned-stairs Adder Tree
نویسندگان
چکیده
In this paper we describe a new complex multiplier based on Distributed Arithmetic (DA) using an overturned-stairs adder tree (OS-tree). The OS-tree yields the same speed as the optimal Wallace tree, but has the advantage of a regular layout. A 17×13 complex multiplier is implemented with MietecTM 0.35 μm standard CMOS technology. It can execute 30 Mmult./s and dissipate about 15 mW at 25 Mmult./s while operating at 1.5 V.
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